Chip Scale Package

Chip Scale Package
Information technology: CSP (IC)

Универсальный русско-английский словарь. . 2011.

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  • Chip scale package — A chip scale package (CSP) (sometimes, chip scale package with a hyphen) is a type of integrated circuit chip carrier. Originally, CSP was the acronym for chip size packaging. Since only a few packages are chip size, the meaning of the acronym… …   Wikipedia

  • Chip Scale Package — Ein Embedded Intel Pentium MMX in BGA Bauweise von unten gesehen. Gut zu erkennen sind die Lotperlen. Beidseitig bestückte Platine in BGA Technik …   Deutsch Wikipedia

  • Package on package — (PoP) is an integrated circuit packaging technique to allow vertically combining discrete logic and memory ball grid array (BGA) packages. Two or more packages are installed on top of one another, i.e. stacked, with a standard interface to route… …   Wikipedia

  • Chip carrier — A standard sized 8 pin dual in line package (DIP) containing a 555 timer IC. A chip carrier, also known as a chip container or chip package, is a container for a transistor or an integrated circuit. The carrier usually provides metal leads, or… …   Wikipedia

  • Quad-flat no-leads package — 28 pin QFN, upside down to show contacts and thermal/ground pad Flat no leads packages such as QFN (quad flat no leads) and DFN (dual flat no leads) physically and electrically connect integrated circuits to printed circuit boards. Flat no leads …   Wikipedia

  • Micro Leadframe Package — MLP package 28 pin chip, upside down to show contacts Micro leadframe package (MLP) is a family of integrated circuit QFN packages, used in surface mounted electronic circuits designs. It is available in 3 versions which are MLPQ (Q stands for… …   Wikipedia

  • Dual in-line package — PDIP redirects here. PDIP may also refer to Indonesian Democratic Party – Struggle. Three 14 pin (DIP14) plastic dual in line packages containing IC chips …   Wikipedia

  • Computer-Chip — Integrierter Schaltkreis. Das Chip Gehäuse wurde geöffnet und ermöglicht den Blick auf den eigentlichen Halbleiter. Die erkennbaren Strukturen im Zentrum sind die realisierte elektronische Schaltung. Im Außenbereich sind die goldenen… …   Deutsch Wikipedia

  • Wafer-scale integration — Wafer scale integration, WSI for short, is a yet unused system of building very large integrated circuit networks that use an entire silicon wafer to produce a single super chip . Through a combination of large size and reduced packaging, WSI… …   Wikipedia

  • Teraflops Research Chip — The Teraflops Research Chip (also called Polaris) is the first processor prototype developed by Intel s Tera scale Computing Research Program in multi core and energy efficient computing. The processor was briefly presented at the IDF on… …   Wikipedia

  • Three-dimensional integrated circuit — In electronics, a three dimensional integrated circuit (3D IC, 3D IC, or 3 D IC) is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. The semiconductor… …   Wikipedia


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